The AI Race’s New Bottleneck Is Packaging, Not Chips

For two years the semiconductor industry’s scarcest resource was leading-edge chip production. That bottleneck has moved. The binding constraint on AI hardware in 2026 is advanced packaging — the intricate process of stitching processors, high-bandwidth memory and interconnects into a single module — and the companies that control packaging capacity now hold unusual power over the pace of the entire AI build-out.

Packaging used to be the industry’s quiet backwater: low margins, modest technology, outsourced without a second thought. AI accelerators changed the economics completely. A modern AI module is not one chip but a carefully engineered sandwich of logic dies and stacked memory, and assembling it requires capacity that only a handful of firms possess at scale. Readers who follow our business and technology coverage will know how quickly a backwater can become a chokepoint.

Why Packaging Became the Hard Part

The physics are unforgiving. AI training chips need to move data to memory at extraordinary rates, which means the memory must sit microns away from the processor, stacked in towers of DRAM connected by thousands of microscopic vias. TSMC’s CoWoS process, the industry’s reference technology, places chips on a silicon interposer larger than the reticle limit of the lithography machines themselves — a manufacturing puzzle that took years to yield reliably.

Capacity, accordingly, is booked out far in advance. Nvidia’s allocation absorbs the majority of CoWoS output; AMD, Broadcom and the hyperscalers’ in-house silicon teams compete for the remainder. Industry analysts at MIT Technology Review and elsewhere have documented how packaging lead times, more than wafer starts, now set delivery schedules for AI servers.

The Capacity Race

The response has been a construction boom. TSMC is building dedicated packaging plants and expanding CoWoS lines at a pace the company itself describes as urgent. Intel is marketing its EMIB and Foveros technologies to customers who cannot get CoWoS slots, and has converted facilities in New Mexico and Malaysia for advanced packaging. Samsung, long the third player, bundles its HBM memory with packaging in a turnkey offer designed to win back AI customers.

Governments have noticed. Subsidy programmes that once targeted fabs now fund packaging plants too, on the logic that a chip packaged abroad is still a dependency. The United States, Japan and India have all announced support for domestic packaging ecosystems in the past eighteen months.

One layer deeper, the substrate has become a second chokepoint. Advanced packages sit on specialised laminate substrates whose supply is concentrated among a few Japanese and Taiwanese makers, and lead times for the largest ABF substrates have stretched alongside CoWoS itself. Equipment is the third constraint: the thermocompression bonders that attach dies with micron precision are effectively single-sourced, and their maker has been allocating deliveries among packaging giants. Scarcity, in other words, runs all the way down the stack — a fact that explains why capacity announcements are scrutinised as closely as chip launches.

What It Means for Buyers

For the hyperscalers and AI labs buying accelerators, packaging scarcity translates directly into deployment timetables: clusters arrive when the packaged modules arrive. That has pushed buyers towards multi-year capacity reservations, prepayments and, in some cases, equity-style partnerships with packaging suppliers. It has also revived interest in alternative architectures — larger monolithic dies, optical interconnects, chiplet standards such as UCIe — each an attempt to route around the constraint.

Investors have re-rated the segment accordingly. Specialist packaging firms that once traded like commodity assemblers now command valuations closer to equipment makers, and the equipment makers themselves — suppliers of the bonding, inspection and substrate tools packaging requires — report order books stretching into 2027.

The Bottom Line

Silicon still matters, but the AI supply chain’s centre of gravity has shifted downstream, to the unglamorous art of putting chips together. Until packaging capacity catches up with demand — most estimates say 2027 at the earliest — the firms that master it will keep setting the tempo for everyone else, much as a different kind of automation is setting the tempo in the office, as we explore in our look at small businesses handing back-office work to AI agents.